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All Aboard the Small Form Factor Express
COM Express
Big is beautiful – or so we are told. But now it looks like small and petit is well and truly back in fashion.
SWAP – Size Weight And Power is the driving force behind many embedded applications today and low power, and often small footprint, processors such as those made by UK based ARM and Intel’s ATOM enable designs to shrink to very small proportions.
COM Express was ratified by PICMG in 2005, but now 6 years later the COM Express Mini / Ultra (or Nano ETX Express as Kontron would have us call it) is here and its tiny!
This new form factor is about the size of a credit card, specifically 55mm x 84mm and can have one of 2 connector configurations defined by the COM Express standard; both using a 220 pin connector.
- Type 1: Single connector (220 pin), 6 PCI Express lanes, no PEG, no PCI, no IDE, 4 SATA, 1 LAN
- Type 10: Single connector (220 pin), 4 PCI Express lanes, no PEG, no PCI, no IDE, 2 SATA, 1 LAN, single channel LVDS only, DDI, no VGA, 2 Serial COM
As you can see the focus is high speed PCI Express and Type 1 has 6 PCI Express lanes. But the more popular Type 10 maximises the variety and has a lower 4 PCI Express Lanes but adds Serial COMS, DDI (digital display interface) and LVDS.
A custom carrier board will need to be designed by the OEM to host the COM Express module but this can easily remain in the small footprint allowing the form factor to be used in ultra small, mobile and hand held applications. This enables new application opportunities that were previously inhibited by size, weight or power restrictions.
Applications – robotics, UAV, communications, computing, EPOS, handheld terminals and small rugged computers.
XPand6001 - Extreme Engineering
Sarsen Technology Limited is currently reviewing a range of COM Express modules for the UK market; if you have a project requirement or would like to know more about small form factor boards and chassis please get in touch via the website.
Links/References:
ARM – http://www.arm.com
ATOM – http://www.intel.com/…
Extreme Engineering – http://www.x-es.com
Image Credit – www.kontron.com
Embedded Testing – Extreme Engineering Solutions
X-ES BIT
In any embedded and critical system, reliability is often the most important feature. X-ES Built-In Test (BIT) software provides exceptional test coverage through Power-On BIT (PBIT), Continuous BIT (CBIT) and Initiated BIT (IBIT) routines. Integrated as a standard component of X-ES Board Support Packages (BSPs), X-ES BIT software requires no additional purchase.
http://www.xes-inc.com/capabilities/software/bit/
Built-In Test (BIT) is a critical aspect of system reliability and maintainability. BIT support provides our customers with the capability to quickly detect, isolate, and determine the root cause of a potential problem within their system. Through the use of X-ES BIT, system reliability, maintainability, and operational availability can be improved. X-ES BIT is an open, extensible test platform that developers can incorporate into their system design to reduce the amount of development they need to do in order to meet their testing and diagnostic requirements.
What makes X-ES BIT Best In Class?
- Free with all current X-ES Intel and Freescale SBC’s
- BIT covers all of the major SBC functional blocks
- Standardized API across architectures and operating systems
- Written in ANSI C, licensed source code is included
- X-ES BIT supports Power-On BIT (PBIT),also known as Power-On Self Test (POST), Continuous BIT (CBIT), and Initiated BIT (IBIT)
You can follow Extreme Engineering Solutions on Twitter or View their website here – www.x-es.com
Intel unveils 22nm 3D Ivy Bridge processor
Traditional planar chip design (left) and Intel's new Tri-Gate technology (right). The company believes that 3D transistors perform more efficiently
Intel has unveiled its next generation of microprocessor technology, code named Ivy Bridge.
The upcoming chips will be the first to use a 22 nanometre manufacturing process, which packs transistors more densely than the current 32nm system. Intel said it would also be using new Tri-Gate “3D” transistors, which are less power hungry. Rival chip manufacturers including AMD and IBM are understood to be planning similar designs. Conventional planar transistor Traditional microprocessor transistors are “planar” or flat as they pass through the switching gate.
Tri-Gate – Intel Tri-Gate diagram The Tri-Gate system features 3D “fins”. Intel claims the greater surface area improves efficiency.
The announcement marks a significant step forward in the commercial processor industry, which is constantly striving to build more transistors onto silicon chips. One of the main measures of its progress is the length of the transistor “gate”, measured in nanometres (1nm = 1 billionth of a meter). A human hair is around 60,000 nm wide. Current best microchip technology features a 32nm gate. It has been known for a long time that 22nm technology would form the next stage in the evolution of microprocessors. However, the exact nature of Intel’s offering has been a closely guarded secret, until now.
The company expects to begin commercial production later this year.
SOURCE – BBC – http://www.bbc.co.uk/news/technology-13283882
A Match Made in Silicon Heaven?
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| A configurable Intel Atom processor with an on-package Altera FPGA |
I stumbled across this article the other day and it got me thinking about what a big partnership this is and what impact it will have on the embedded world.
E600 brings everything onboard for the platform, including PCI-E for using the E600 in a multitude of different capacities. Either bring your own PCH or build one yourself – Intel already showed examples of Realtek, OKI, and ST Microelectronics on stage. If you’re just building a desktop, Intel has a fairly standard platform controller hub called the EG20T for control like ethernet, SATA and USB. Intel really hopes that their embedded Atom platform will bring cost of system integration way down.
Ok So its a new ATOM CPU so what?
When designing a microprocessor you have two options. For very complex designs you have a bunch of engineers come up with an architecture. They then spend countless hours, days, months, eons designing it, and doing layout and performance optimization. Photolithographic masks are made and handed off to a fab that produces the silicon on wafers. This is a great approach for microprocessors that have high complexity, performance and volume demands. If you have a simpler design and want to get it to market cheaper, there’s another option: a FPGA.
A field programmable gate array is exactly what it sounds like, a whole bunch of gates on a die that can be programmed in the field. An FPGA can be made to function like pretty much whatever microprocessor design you program it to be. You shave off the initial manufacturing costs as you don’t need to make expensive masks. FPGAs are often used in emulating larger microprocessor designs.
As Intel tries to take the Atom into the embedded space it may run into some customers that want to pair Atom with custom hardware. Intel could simply make a version of Atom for every single market vertical, however that would incur a significant cost overhead.
Instead, in the first half of 2011 Intel will introduce the Stellarton processor. It’s a configurable Intel Atom processor with an on-package Altera FPGA.
The theory sounds great but in practice this could be tricky device to integrate – don’t you think?
VPX & OpenVPX Technology from Extreme Engineering Solutions
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| VPX Rugged Boards from X-ES |
X-ES is an industry and technology leader with regard to VPX and OpenVPX™. X-ES was actively involved in the development of the VPX and OpenVPX standardization efforts. X-ES was one of the first companies to develop VPX products and has been shipping VPX products since 2006.
VPX Specification
VPX (VITA 46), a module standard, was developed in support of ruggedized, deployed applications and is the technology of choice for ruggedized military applications where Size, Weight, and Power (SWaP) are an issue. VPX supports both 3U and 6U form factors, provides a large amount of high-speed I/O to the backplane, and enables the use of modules that require up to 200 watts of power.
VPX-REDI Specification
The Ruggedized Enhanced Design Implementation (REDI) laid out in VITA 48 defines how to implement cooling methodologies on specific board form factors. It supports enhanced forced-air cooling (using baffles and plenums), advanced conduction cooling (using larger and more efficient thermal interfaces), and liquid cooling. It also addresses the use of ESD covers on both sides of the board, a necessary feature for military two-level maintenance strategies.
OpenVPX™ Specification
OpenVPX™ (VITA 65) builds on the module-centric VPX specifications by providing a nomenclature of planes and profiles to enable system integrators, module designers, and backplane providers to effectively describe and define aspects and characteristics of a system. OpenVPX addresses major system interoperability issues while allowing for flexibility within the system, as enabled by its planes and flexible module profiles featuring user-defined I/O. By following a system-centric approach and defining a number of standard system topologies, OpenVPX enables interoperable off-the-shelf modules and development platforms within the VPX marketplace.
OpenVPX profiles make is easy to build development systems with compatible components. Deployable systems will always have system issues that need to be addressed, such as I/O, custom backplanes, power, and cooling. X-ES not only understands these issues, but has solved integration and system-level problems and delivered integrated VPX system solutions to customers.
X-ES provides a comprehensive line of 3U and 6U VPX products, including Intel®-based and PowerPC-based Single Board Computers (SBCs), carriers, switches, and I/O cards for embedded computing applications.
Because the environmental and SWaP constraints associated with rugged, deployed solutions complicate the design and integration of these systems, X-ES provides additional system-level components such as backplanes, power modules, development platforms, and deployable systems.
For more details and to view the range of VPX and OpenVPX products visit -
VPX and OpenVPX™ Technology – Extreme Engineering Solutions, Inc
Intel Sandy Bridge Processors & Embedded Computers
There has been a lot of talk regarding the “2nd generation Intel® Core™ processor family,” previously known as Sandy Bridge. Some of the talk out there contains a bit of hype, but the reality is there are some major design changes to the processor in the Sandy Bridge architecture that will vastly improve single board computer, embedded motherboard and industrial computer system performance, power efficiencies and platform security.
Industrial computing solutions deployed in Mil-COTS defense applications, medical imaging and industrial automation systems are well suited to take full advantage of Sandy Bridge micro-architecture features. Trenton is hard at work developing a single processor system host board based on Sandy Bridge technology and expects to have evaluation units available by the end of Q1!
The way the processor sections on the Sandy Bridge CPU die have been re-ordered in this new architecture provides a tighter integration between the memory interface, processing cores and the traditional Northbridge functions. This is being argued as the first major, ground up x86 processor design since the Intel® Pentium® Pro was introduced back in the early ’90s. That is the not Intel® hype per se, but in going though the re-ordering and re-structuring of the CPU die in Sandy Bridge, we can see validity of the claim that Sandy Bridge processors should provide a significant performance boost compared to the previous generation Westmere class of CPUs at a sharply reduced power consumption.
The Sandy Bridge architecture provides multiple processing cores with up to eight cores in the processor versions scheduled for release later this year and into the early part of next year. In addition to the processor cores, there is a separate graphics core and a new processor feature called Intel® AVX. AVX stands for Advanced Vector Extensions and it improves floating point computational speeds. A doubling of the vector widths to 256 bits and the ability to process partial width load and store operations also helps this AVX capability to boost performance.
All of this gets combined with a new capability of applying Intel® Turbo Boost Technology across all cores; including the graphics core, to dynamically boost selected core processing frequencies based on the demands of the system at any given time. This should boost high-def video and 3-D graphics performance in video processing applications. One of the other improvements in Sandy Bridge is the ability to use these new processor architecture features to support multiple video and 3D graphic interfaces directly out of the processor.
Benchmark testing for our future board and system designs will confirm and quantify just how much of a performance boost to expect in your industrial computer applications using Sandy Bridge technology. Trenton’s first Sandy Bridge-based SBC will be introduced next month and supports some interesting features such as dual video interfaces and a mini-PCI Express connector to support industry standard mini-PCIe cards. Stay tuned for future Trenton developments or give your Trenton account manager a call at 770.287.3100 or 800.875.6031 for additional information.
This submission is by Jim Renehan, Director of Marketing at Trenton Technology
SOURCE – Are Sandy Bridge Processors & Embedded Computers a Good Fit?
PCIe 3.0 Spec to Be Published in November – CPUs, Boards & Components by ExtremeTech
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| PCI Express Architecture Difference |
System builders may spend more time thinking about PCI Express (PCIe) than any other brand of consumer, but even they probably give it passing thought only when it comes to video cards. But at the Intel Developer Forum here, the PCI Special Interest Group (PCI-SIG) is reminding people that, like so much else with computers, it’s a constantly evolving technology, and one that will find its next permanent form by the end of the year.
The current focus of the group, which was founded in 1992 to develop and manage the PCI standard, is PCIe 3.0. This latest incarnation of the specification builds on PCIe 2.0 (released in 2007), by offering improved data rates (8 gigatransfers per second as opposed to 5) and encoding (128- and 130-bit versus 8- and 10-bit when operating at 8 GTps), the latter of which the PCI-SIG allows 98.5 percent efficiency. PCIe 3.0 will also be backwards compatible with both PCIe 1 and PCIe 2 specs.
Architecture Raw Bit Rate Interconnect Bandwidth Bandwidth per Lane per Direction Total Bandwidth for x16 Link
Also among the new features in the PCIe 3.0 architecture is Dynamic Feedback Equalization (DFE). This is a technique in electrical signaling that adapts to the time-vairant properties of the transmission medium to obtain an optimum Signal-to-Noise ration at the sample point of the receiver. Representatives of the PCI-SIG say that DFE will improve the PCIe bus signal integrity.
The development of PCIe 3.0 is expected to facilitate the development of faster Ethernet technology, InfiniBand, PCIe switches, and high-capacity storage (especially solid-state drives).
According to PCI-SIG President and Chairman Al Yanes, the PCIe 3.0 specification is expected to be published in November, following a 60-day IP review on the heels of the release of the most recent version, PCIe 3.0 Rev 0.9, on August 16. (It may be read on the PCI-SIG Web site.)
With silicon for PCI Express® 3.0 on the horizon from chip vendors such as Intel®, PLX Technology®, IDT® and others, it might be a good idea to review the interface differences of PCI Express 3.0, PCIe 2.0 and PCIe 1.1. Understanding these interface differences will enable successful integration of the latest PCI Express interface technology into embedded computing applications.
Does it matter that the single board computer / system host board and option card interface is PCI Express version 1.1, 2.0 or even the upcoming PCIe 3.0? Not really, because the basic SBC to option card interconnect functionality is not affected by PCIe version. The reason for this is that the PCI-SIG (Peripheral Component Interconnect Special Interest Group) did a smart thing when PCI Express 1.1 was first developed. The PCI-SIG built the basic PCIe interconnects in such a manner as to ensure both scalability and backwards compatibility between differing PCIe interfaces. This critical specification feature enables the computer’s SBC / SHB, embedded motherboard or backplane hardware to operate with just about any PCI Express option card regardless of interface version. The potential for increased data throughput and performance within an embedded computing system is the primary application difference between the PCI Express 3.0, 2.0 and 1.1 interfaces.
A PCI Express 2.0 COTS board installed in an industrial computer will send its data over to the system host board (SHB) twice as fast as older PCI Express 1.1 boards. Of course, this assumes that the systems’ SHB has PCIe 2.0 interfaces. The same scenario plays out in an embedded motherboard. If the motherboard is equipped with PCIe 2.0 card slots then any PCIe 2.0 card placed into one of these slots will send it’s data to the board’s CPUs twice as fast as in a PCIe 1.1 system. This speed advantage is cumulative and can be critical in high-performance computing applications.
PCIe 3.0 features a number of interface architecture improvements, but communicates at the same interface speeds used in PCIe 2.0. PCIe 3.0 achieves twice the communication speeds of PCIe 2.0 through various architecture and protocol management improvements. PCIe 3.0 silicon will start becoming readily available in 2011. Single board computers such as the Trenton JXT6966 and JXTS6966 support a wide variety of PCI Express option card interfaces. Trenton embedded motherboards like the Trenton NTM6900 and Trenton WTM7026 feature multiple PCI Express option card slots and Trenton BPC7041 and BPC7009 backplanes are examples of PICMG 1.3 backplanes with built-in PCI Express 2.0 embedded computing hardware support.
