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Epiphany Architecture Promises Massive Floating-Point Gains
Epiphany Architecture
Earlier this month BittWare announced “A New Approach to Floating Point DSP” with the release of the Anemone Co-Processor. The Anemone floating point co-processor chip is designed for use with Altera’s high performance FPGAs. OEM’d from Adapteva’s new Epiphany architecture, BittWare’s Anemone chip is a scalable, true C-programmable, floating point engine that enables novel solutions for complex and evolving signal processing applications.
It’s something which has already caught the eye of FPGA and DSP specialist BittWare, which has licensed Adapteva’s Epiphany technology for use in its own Altera-based FPGAs under the name Anemone. “We believe that Adapteva’s Epiphany architecture represents a flash of brilliance that reintroduces some much needed creativity into the embedded signal processing world,” BittWare’s chief Jeff Milrod crowed at the launch of Anemone. “The resulting Anemone chip, combined with Altera’s family of FPGAs, creates an insanely cool solution for complex signal processing tasks that can be optimised for power, performance, and productivity.”
So what is Epiphany? Here’s the opening section of an interview with Andreas Olofsson of Adapteva with THINQ:
While chip giants ARM, Intel, and AMD battle for control of your smartphones and PCs, a small company in Massachusetts called Adapteva is starting a revolution: many-core processors that offer a significant performance boost over anything currently on the market. We chat to its founder Andreas Olofsson to find out what’s going on.
Initially, it’s easy to dismiss Adapteva’s chances of success as slim to none: in markets where a single processor architecture holds overwhelming dominance, such as x86 in mainstream computing and ARM in the world of smartphones, Olofsson has decided to develop an entirely new architecture.
Olofsson readily admits that history is littered with companies who have tried the same approach and failed. “In the mobile space there’s MIPS, for example,” he explained to thinq_ during our interview. “That’s another architecture, which has been around for 25, 30 years now – you know, it’s a great architecture, and yet they have very low traction. Everybody – 98 per cent of the market – uses ARM.”
To avoid falling into the same trap, Olofsson has a new idea – or, specifically, a variation on an old one. In the early days of personal computing, it was common for a central processor to have a ‘math co-processor’ chip alongside it – a secondary processor which was designed specifically to carry out floating point arithmetic at speeds significantly faster than the main processor. Intel had its 8087, Motorola its 68881, and AMD the stand-alone 9511.
Over time, however, these chips became integrated into the processor itself – evolving into the high-performance floating-point units, or FPUs, that are a feature of all modern central processors. Olofsson’s big idea, he explained, is to bring the days of the math co-processor back – and promises some major performance-per-watt gains for those making the step.
Read more / Source – THINQ
See Also – Wall Street Journal, BittWare Anemone, Adapteva
Intel unveils 22nm 3D Ivy Bridge processor
Traditional planar chip design (left) and Intel's new Tri-Gate technology (right). The company believes that 3D transistors perform more efficiently
Intel has unveiled its next generation of microprocessor technology, code named Ivy Bridge.
The upcoming chips will be the first to use a 22 nanometre manufacturing process, which packs transistors more densely than the current 32nm system. Intel said it would also be using new Tri-Gate “3D” transistors, which are less power hungry. Rival chip manufacturers including AMD and IBM are understood to be planning similar designs. Conventional planar transistor Traditional microprocessor transistors are “planar” or flat as they pass through the switching gate.
Tri-Gate – Intel Tri-Gate diagram The Tri-Gate system features 3D “fins”. Intel claims the greater surface area improves efficiency.
The announcement marks a significant step forward in the commercial processor industry, which is constantly striving to build more transistors onto silicon chips. One of the main measures of its progress is the length of the transistor “gate”, measured in nanometres (1nm = 1 billionth of a meter). A human hair is around 60,000 nm wide. Current best microchip technology features a 32nm gate. It has been known for a long time that 22nm technology would form the next stage in the evolution of microprocessors. However, the exact nature of Intel’s offering has been a closely guarded secret, until now.
The company expects to begin commercial production later this year.
SOURCE – BBC – http://www.bbc.co.uk/news/technology-13283882
Anemone Co-Processor for FPGAs, BittWare Inc
Anemone Co-Processor for FPGAs
SAN JOSE, CALIFORNIA – May 3, 2011 – BittWare announced today, at the Embedded Systems Conference, the Anemone floating point co-processor chip for use with Altera’s high performance FPGAs.
Read the Full Press Release here: http://www.bittware.com/media/press/pr.cfm?id=62
BittWare yesterday introduced Anemone to the Embedded Systems Conference. What is it?
Its a Floating Point Co-Processor for FPGAs. Anemone represents a new hybrid approach for floating point signal processing that adds a low-power, C-programmable compute engine to world-class FPGA technology from Altera.
Features
- 16 independent floating point cores
- 32 GFLOPS of floating point processing
- 2 Watts total chip power
- ANSI C-programmable
- IEEE Floating Point
- Shared memory architecture
- External I/O via memory-mapped links
- Scale multiple chips up to 8 TFLOPS
- High throughput mesh network
- Standard GNU/Eclipse Development Tools
- Available from BittWare on standard board formats
For more information – visit the Anemone page on BittWare’s website.
Traditional floating point DSPs, while excellent at complex processing tasks, have limitations when it comes to chip real estate and power efficiency that have caused them to become an endangered species. And FPGAs, while superior for versatility and configurability, can be difficult to use for complex and evolving applications. The BittWare Anemone, featuring the Epiphany architecture from Adapteva, enables the best assets of both to be combined, thereby offering a completely new approach to floating point digital signal processing. This hybrid solution provides a standard processor software development environment working in conjunction with a world-class FPGA platform, allowing users to optimally partition their algorithms into hardware and software. The result is superior development productivity and unmatched system size, weight, and power.
Focus on power & efficiency
Anemone is a truly C-programmable floating point compute engine. It is unique in that it achieves superior power efficiency and processing performance because it is designed to work alongside an FPGA as a co-processor. The FPGA handles all the memory, I/O interfacing, protocol processing, and special functions in addition to any computational tasks it may perform, leaving the Anemone free to efficiently perform the complex processing tasks that DSPs are ideal for. This allows Anemone to be an extremely efficient chip – as compared with traditional floating point DSPs that may only use 5% of the silicon area for processing.
Simple, elegantly designed floating point cores
The Anemone is a completely scalable 1 GHz multicore processor with 16 eCores that provide a total sustained performance of 32 GFLOPS while consuming only 2 Watts of total chip power. Each eCore features a compact, general-purpose instruction set that requires no instruction level parallelism and provides high program efficiency. All floating point computations are performed as single-precision IEEE 754; hardware looping is also supported. Anemone offers distributed and segmented memory, and large uniform register files. On-chip distributed shared memory is 4 Mb (32 KByte per eCore) with 32 GBytes/sec of sustained memory bandwidth within each eCore. The cache-less shared memory architecture is extended off-chip via I/O links.
High-throughput eMesh network
The Anemone features an internal high-throughput mesh network, with separate data paths for on-chip and off-chip communications. Each eCore has a multi-channel DMA engine to support background data movement over the mesh. Total on-chip, inter-core bandwidth is 128 GBytes/sec full duplex, with an additional 8 GBytes/sec of off-chip bandwidth. Each router node can simultaneously sustain full-duplex transfers on all ports, with automatic routing based on global addressing.
I/O via memory-mapped high-speed links
The Anemone provides a flexible low-overhead external interconnect scheme that supports memory-mapped direct connection of multiple Anemones and is compatible with any LVDS capable FPGA. This is achieved via four links that are full-duplex 8-bit LVDS data ports @ 500 MHz DDR, each simultaneously providing 1 GByte/sec in each direction for a total off-chip bandwidth of 8 GBytes/sec. Its FPGA co-processor use model provides the ultimate flexibility: since all external I/O goes through an FPGA, system designers can customize the I/O to their application’s specific requirements.
ANSI C-programmable; Standard GNU development tools
The Anemone reduces system development cost by enabling out-of-the-box execution of applications written in regular ANSI-C. It does not require any C-subset, language extensions, or SIMD. Standard GNU development tools are supported including an optimizing C complier, simulator, GDB debugger, and Eclipse multi-core IDE.
MP32: First Soft Processor Supporting MIPS and VxWorks
MP32 is a royalty-free soft core processor from ALTERA, allowing you to easily increase performance by adding as many MP32 processors as you can fit on your FPGA.
What makes the MP32 processor ideal for your custom embedded applications?
- It’s the first MIPS®-compatible soft processor.
- It runs Wind River’s VxWorks real-time operating system, so you can use familiar tools and middleware.
- It’s optimized for Altera® FPGAs and HardCopy® ASICs, including previous-generation and future devices.
SOURCE: MP32: First Soft Processor Supporting MIPS and VxWorks.
Faster Time to Market
A flexible, applications-class processor, MP32 brings with it the expansive MIPS ecosystem of software and tools. This includes intellectual property (IP) cores for embedded processing, protocols, memory control, and applications including video, digital signal processing, and networking.
You’ll get faster time to market because you can reuse a lot of IP—including your own. You’ll also experience faster system integration because you can use our common FPGA design flow, based on Qsys. The Qsys system integration tool, available in Quartus® II software, automatically generates interconnect logic to connect IP functions and subsystems.
Since you can reuse software you’ve already written for your MIPS processor, you’ll be able take advantage of the code, IP, and expertise your team already has.
Ethernet Becomes Entrenched as Military System Interconnect – COTS Journal
Very good article on COTSJournal about Ethernet and its growing use in Military/Defence applications.
Ethernet is becoming entrenched as a favorite interconnect fabric in compute-intensive applications like sonar, radar or any application that networks sensor arrays together. System designers are reaping the benefits from the marriage of Ethernet with embedded computing form factors like OpenVPX, VXS, Compact PCI Express, MicroTCA and AMC. While once used only as a pure networking solution for command and control systems in the military, Ethernet is now gaining traction in numerous other military applications as an interconnect fabric in compute-intensive applications. It’s also deployed as multilayer switches with dual IPv4 and IPv6 forwarding to support the DoD’s sweeping plans to leverage the benefits of IPv6 (Internet Protocol version 6).
The number of programs embracing Ethernet—including both upgrades and new advanced systems—continues to ramp upward.
OPEN VPX
For rugged, harsh environment military applications, OpenVPX is emerging as the newest choice for Ethernet-based switched network applications. OpenVPX offers the advantage of high-performance computing in limited size, weight and power platforms where extreme ruggedness and harsh environment operation are required. These include everything from military combat vehicle systems to UAVs to tactical aircraft avionics. OpenVPX is perfectly suited to handle the huge processing demands of today’s ISR and C4I applications.
Source – Ethernet Becomes Entrenched as Military System Interconnect – COTS Journal.
Altera Breaks Semiconductor Industry Record
Altera Stratix V FPGA
Altera Breaks Semiconductor Industry Record for Most Transistors on an Integrated Circuit – and delivers the industry’s highest bandwidth, highest performance FPGA, featuring a record setting 3.9 Billion transistors!
San Jose, Calif., April 18, 2011 – Altera Corporation (Nasdaq: ALTR) today announced it set an industry milestone in semiconductor technology by delivering the most transistors ever packed onto an integrated circuit. Altera’s 28-nm Stratix V FPGAs are the semiconductor industry’s first devices to feature 3.9 billion transistors. This level of functionality delivers unparalleled performance to system designers.
Read the Full Press Release Here & The Stratix V data on the Altera Website Here.
Xilinx : Zynq-7000 Extensible Processing Platform
Is this the new trend for 2011 – FPGA and Micro Processor going hand in hand?
This time its ARM and Xilinx.
The Zynq™-7000 family is Xilinx’s first Extensible Processing Platform (EPP). This new class of product combines an industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with Xilinx unified 28nm architecture. This processor-centric architecture offers the flexibility and scalability of an FPGA combined with ASIC-like performance and power and the ease of use of an ASSP.
The four devices of the Zynq-7000 EPP family allow designers to target cost sensitive as well as high-performance applications from a single platform using industry-standard tools. The tight integration of the processing system with programmable logic allows designers to build accelerators and peripherals to speed key functions by up to 10x. ARM architecture and ecosystem maximizes productivity and eases development for software and hardware developers.
http://www.xilinx.com/technology/roadmap/zynq7000/features.htm
A Match Made in Silicon Heaven?
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| A configurable Intel Atom processor with an on-package Altera FPGA |
I stumbled across this article the other day and it got me thinking about what a big partnership this is and what impact it will have on the embedded world.
E600 brings everything onboard for the platform, including PCI-E for using the E600 in a multitude of different capacities. Either bring your own PCH or build one yourself – Intel already showed examples of Realtek, OKI, and ST Microelectronics on stage. If you’re just building a desktop, Intel has a fairly standard platform controller hub called the EG20T for control like ethernet, SATA and USB. Intel really hopes that their embedded Atom platform will bring cost of system integration way down.
Ok So its a new ATOM CPU so what?
When designing a microprocessor you have two options. For very complex designs you have a bunch of engineers come up with an architecture. They then spend countless hours, days, months, eons designing it, and doing layout and performance optimization. Photolithographic masks are made and handed off to a fab that produces the silicon on wafers. This is a great approach for microprocessors that have high complexity, performance and volume demands. If you have a simpler design and want to get it to market cheaper, there’s another option: a FPGA.
A field programmable gate array is exactly what it sounds like, a whole bunch of gates on a die that can be programmed in the field. An FPGA can be made to function like pretty much whatever microprocessor design you program it to be. You shave off the initial manufacturing costs as you don’t need to make expensive masks. FPGAs are often used in emulating larger microprocessor designs.
As Intel tries to take the Atom into the embedded space it may run into some customers that want to pair Atom with custom hardware. Intel could simply make a version of Atom for every single market vertical, however that would incur a significant cost overhead.
Instead, in the first half of 2011 Intel will introduce the Stellarton processor. It’s a configurable Intel Atom processor with an on-package Altera FPGA.
The theory sounds great but in practice this could be tricky device to integrate – don’t you think?
ZX81: Small black box of computing desire
The Sinclair ZX81 was small, black with only 1K of memory, but 30 years ago it helped to spark a generation of programming wizards.
Packing a heady 1KB of RAM, you would have needed more than 50,000 of them to run Word or iTunes, but the ZX81 changed everything.
It didn’t do colour, it didn’t do sound, it didn’t sync with your trendy Swap Shop style telephone, it didn’t even have an off switch. But it brought computers into the home, over a million of them, and created a generation of software developers.
Before, computers had been giant expensive machines used by corporations and scientists – today, they are tiny machines made by giant corporations, with the power to make the miraculous routine. But in the gap between the two stood the ZX81.
SOURCE – BBC News – ZX81: Small black box of computing desire
Embedded World – 2011
The embedded world Exhibition&Conference is the world´s biggest exhibition of its kind and the meeting-place of the international embedded community. Embedded technologies are in action everywhere -whether in the car, data and telecommunication systems, industrial and consumer electronics, military systems or aerospace.
The embedded world Exhibition&Conference is the top get-together for the international embedded community. The exhibition set another record in 2010 with 730 exhibiting companies, and more than 18,000 trade visitors used the opportunity to obtain a comprehensive picture of the latest embedded technology trends.
Will you be going?
Are you already there?
What are you looking for at EW2011?
Visit the Exhibition Website – Embedded World
