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All Aboard the Small Form Factor Express
COM Express
Big is beautiful – or so we are told. But now it looks like small and petit is well and truly back in fashion.
SWAP – Size Weight And Power is the driving force behind many embedded applications today and low power, and often small footprint, processors such as those made by UK based ARM and Intel’s ATOM enable designs to shrink to very small proportions.
COM Express was ratified by PICMG in 2005, but now 6 years later the COM Express Mini / Ultra (or Nano ETX Express as Kontron would have us call it) is here and its tiny!
This new form factor is about the size of a credit card, specifically 55mm x 84mm and can have one of 2 connector configurations defined by the COM Express standard; both using a 220 pin connector.
- Type 1: Single connector (220 pin), 6 PCI Express lanes, no PEG, no PCI, no IDE, 4 SATA, 1 LAN
- Type 10: Single connector (220 pin), 4 PCI Express lanes, no PEG, no PCI, no IDE, 2 SATA, 1 LAN, single channel LVDS only, DDI, no VGA, 2 Serial COM
As you can see the focus is high speed PCI Express and Type 1 has 6 PCI Express lanes. But the more popular Type 10 maximises the variety and has a lower 4 PCI Express Lanes but adds Serial COMS, DDI (digital display interface) and LVDS.
A custom carrier board will need to be designed by the OEM to host the COM Express module but this can easily remain in the small footprint allowing the form factor to be used in ultra small, mobile and hand held applications. This enables new application opportunities that were previously inhibited by size, weight or power restrictions.
Applications – robotics, UAV, communications, computing, EPOS, handheld terminals and small rugged computers.
XPand6001 - Extreme Engineering
Sarsen Technology Limited is currently reviewing a range of COM Express modules for the UK market; if you have a project requirement or would like to know more about small form factor boards and chassis please get in touch via the website.
Links/References:
ARM – http://www.arm.com
ATOM – http://www.intel.com/…
Extreme Engineering – http://www.x-es.com
Image Credit – www.kontron.com
What is an FPGA?
What is an FPGA?
Increasingly FPGAs have gained popularity in the embedded market space to speed up development and for rapid prototyping of complex systems. But what is an FPGA? Here is a very good explanation from market leader Altera.
The field-programmable gate array (FPGA) is a semiconductor device that can be programmed after manufacturing. Instead of being restricted to any predetermined hardware function, an FPGA allows you to program product features and functions, adapt to new standards, and reconfigure hardware for specific applications even after the product has been installed in the field—hence the name “field-programmable”. You can use an FPGA to implement any logical function that an application-specific integrated circuit (ASIC) could perform, but the ability to update the functionality after shipping offers advantages for many applications.
Unlike previous generation FPGAs using I/Os with programmable logic and interconnects, today’s FPGAs consist of various mixes of configurable embedded SRAM, high-speed transceivers, high-speed I/Os, logic blocks, and routing. Specifically, an FPGA contains programmable logic components called logic elements (LEs) and a hierarchy of reconfigurable interconnects that allow the LEs to be physically connected. You can configure LEs to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flipflops or more complete blocks of memory.
As FPGAs continue to evolve, the devices have become more integrated. Hard intellectual property (IP) blocks built into the FPGA fabric provide rich functions while lowering power and cost and freeing up logic resources for product differentiation. Newer FPGA families are being developed with hard embedded processors, transforming the devices into systems on a chip (SoC).
Compared to ASICs or ASSPs, FPGAs offer many design advantages, including:
- Rapid prototyping
- Shorter time to market
- The ability to re-program in the field for debugging
- Lower NRE costs
- Long product life cycle to mitigate obsolescence risk
Source : http://www.altera.com/
DSP Motor Control – Danville Signal Processing
Danville Signal is partnering with Analog Devices to provide high performance motor control solutions that take advantage of ADI’s strong data converter and signal processing portfolio and Danville’s extensive expertise in SHARC DSPs, signal conditioning, vibration instrumentation and product development.
The fourth generation SHARC DSP is particularly well suited for high performance motor control applications. Floating point processing simplifies algorithm development. The architecture of the SHARC is great for very fast, deterministic interrupt processing that is often necessary when managing low latency feedback and servo control.
The latest fourth generation SHARCs, the ADSP-21469 and ADSP-21489 include hardware accelerators for FFT processing. Your motor control system could simultaneously be used for machine monitoring, predictive maintenance or two plane balancing.
Danville’s first product introduction will be a reference design the features ADI’s ADSP-21489, AD7656-1 six channel simultaneous sampling ADCs and AD7401A Isolated signal delta modulators. The reference design will include software examples including support for MathWorks’ MATLAB ®. It also has universal support for industrial communications using HMS’s Anybus ® CompactCom modules.
The reference design uses modular construction. It’s based on the dspblok 21489sp6 DSP+FPGA Module that combines an Analog Devices’ ADSP-21489 SHARC and Xilinx’s Spartan 6 FPGA. We have data converter modules that support the AD7656-1 and other ADI PulSAR ADCs.
You can take Danville’s COTS modules to reduce your design risk and speed up time to market or you can use the reference design as a take off point for your own custom design. We also provide design services that can help you with your motor control application.
Contact Sarsen Technology if you would like to know more about Danville Signal Processing Motor Control and Audio hardware solutions.
More info:
Its a Jet Wash Jim, but not as we know it
No matter how much of an engineer you are, sometimes you just don’t wonder how things are done until you see a picture. Then it becomes an obsession. Well i am not obsessed but I was impressed by this procedure.
I have never wondered how you clean a Lockheed Martin C-130 (and yes I know its not a jet!) – but now I am fascinated by the process. The above picture was included in a blog post by Trenton Technology. If anyone knows just how much water is used to clean one of these aircraft I would really like to know.
If there is a wax and polish programme to how much does that cost?
Source – http://blog.trentontechnology.com/paris-air-show-features-lockheed-martin-c-130j
And if you’ve ever wondered how they keep those planes clean, here’s a C-130J Super Hercules being run through the wash system (nicknamed the Bird Bath) at Keesler Air Force Base, Mississippi. As they often fly extended missions over the ocean, any salt and moisture can result in corrosion if the aircraft are not washed routinely.
Marvell Super Heroic Processors?
Marvell Armada XP
Founded in 1995, Marvell Technology Group Ltd. has operations worldwide and approximately 5,700 employees. They are a fabless semiconductor company, shipping over one billion chips a year. In their words:
“Marvell’s expertise in microprocessor architecture and digital signal processing, drives multiple platforms including high volume storage solutions, mobile and wireless, networking, consumer, and green products. Worldclass engineering and mixed-signal design expertise helps Marvell deliver critical building blocks to its customers, giving them the competitive edge to succeed in today’s dynamic market.”
My interest today is the Quad-Core ARMADA XP Series.
http://www.marvell.com/processors/embedded/armada_xp/assets/armada_xp_pb.pdf
The Extreme Performance (XP) series of multicore processors is a quad-core ARM processor designed primarilly for cloud computing applications. The ARMADA XP series integrates four Marvell designed ARM compliant 1.6GHz CPU cores along with a host of I/O peripherals to offer one of the highest levels of integration in the industry.
I am currently seeking out embedded projects that will require this low power CPU installed on XMC or VPX modules for military and defence applications. The ARMADA XP supports multiple SATA, USB and Ethernet ports as well as PCI-e 2.0 Ports and high speed SERDES lanes.
The processor is ideal of high speed multicore processing applications and integrated on the right platform will make a superb embedded processor for harsh environments.
THE MARVELL ADVANTAGE: Marvell chipsets come with complete reference designs which include board layout designs, software, manufacturing diagnostic tools, documentation, and other items to assist customers with product evaluation and production. Marvell’s worldwide field application engineers collaborate closely with end customers to develop and deliver new leading-edge products for quick time-to-market. Marvell utilizes world-leading semiconductor foundry and packaging services to reliably deliver high-volume and low-cost total solutions.
- Website – http://www.marvell.com
- YouTube – http://www.youtube.com/user/marvellmedia
- Twitter – http://twitter.com/marvellsemi
NVIDIA® Tesla™ GPU Computing Solutions
Trenton Technology brings over thirty years of design, manufacturing and system engineering experience to the world of High-Performance GPU Computing.
With an in-depth knowledge of high-speed bus technology, system BIOS, power requirements and shock, vibration and thermal characteristics is incorporated into every integrated computer system, single board computer, backplane and embedded motherboard.
Trenton are a member of the NVIDIA Tesla Preferred Partner (TPP) program Trenton is now creating computing solutions supporting NVIDIA’s Tesla GPU 20-series computing products and CUDA™ GPU architecture.
“Trenton’s design, engineering and integration capabilities are ideal for customers who require a high-performance computing solution based on industry-specific system requirements,” said Shanker Trivedi, vice president of sales, NVIDIA Professional Solutions Group. “These industry solutions are ideal platforms for implementing NVIDIA’s Tesla computing processors and CUDA GPU architecture.”
Raspberry Pi, The £15 Computer on a Stick
Raspberry Pi - Computer on a Stick
Apple have been using ARM processors iPODs for a number of years. The iPAD uses an ARM Cortex-A9-based CPU accompanied by a GPU. Sony’s next generation portable gaming device (PSP, NGP, VITA) to be launched at sometime later this year will also use an ARM processor.
The consumer and embedded marketplace simply wouldn’t be the same without ARM.
Today I read about something quite amazing on Electronics Weekly – Raspberry Pi is a tiny ARM-based single board computer that enables a TV to run Linux and scripting languages such as Python. Designed by Cambridge business men and academics to engage children with computer science and thereby improve the skills pool from which they draw employees and undergraduates, it is causing a stir in the developing world.
The result is a 32-bit ARM11-based computer than needs no supporting PC. The size of a USB stick, it has an HDMI connector on one end for the TV, a USB connector at the other end for the keyboard, and it boots immediately into Linux running a scripting language.
The company behind this amazing piece of hardware say they can buidl it for £15 each and its mission is: “To promote the study of computer science and related topics, especially at school level, and to put the fun back into learning computing”..
Further details can be found on the Raspberry Pi Foundation website and on Electronics weekly.
Source – http://www.electronicsweekly.com
Mobile Apps Bring Momentum to DRAMs
- Apps – where would we be without them?
The huge success of tablet PCs and smart phones is driving sales in DRAM. Mobile “APPS” are big business, from pointless time wasting games and gimmicks to full blown business and organistaion tools – each requiring varying amounts of DRAM to run efficiently and effectively.
BBC’s The Apprentice even had the teams creating and selling Apps as a task this series.
The stakes are high in mobile memory. Before the onslaught of snazzy smartphones and tablets, mobile DRAM was considered the “sleepy backwater” in the memory market, said Mike Howard, an analyst at IHS iSuppli. Now, thanks to smartphones and tablets, the mobile DRAM sector is expected to grow by 71 percent in 2011, Howard said.
A mobile DRAM costs two to four times more than a PC DRAM because of mobile apps’ stringent size and power demands. The mobile DRAM business is based on a build-to-order model, with pricing driven by cost reductions rather than the fluctuations of supply and demand, as in commodity DRAM, IHS’ Howard said.
For more detailed info go to the SOURCE – Mobile apps bring momentum to DRAMs – EE Times.
Embedded Testing – Extreme Engineering Solutions
X-ES BIT
In any embedded and critical system, reliability is often the most important feature. X-ES Built-In Test (BIT) software provides exceptional test coverage through Power-On BIT (PBIT), Continuous BIT (CBIT) and Initiated BIT (IBIT) routines. Integrated as a standard component of X-ES Board Support Packages (BSPs), X-ES BIT software requires no additional purchase.
http://www.xes-inc.com/capabilities/software/bit/
Built-In Test (BIT) is a critical aspect of system reliability and maintainability. BIT support provides our customers with the capability to quickly detect, isolate, and determine the root cause of a potential problem within their system. Through the use of X-ES BIT, system reliability, maintainability, and operational availability can be improved. X-ES BIT is an open, extensible test platform that developers can incorporate into their system design to reduce the amount of development they need to do in order to meet their testing and diagnostic requirements.
What makes X-ES BIT Best In Class?
- Free with all current X-ES Intel and Freescale SBC’s
- BIT covers all of the major SBC functional blocks
- Standardized API across architectures and operating systems
- Written in ANSI C, licensed source code is included
- X-ES BIT supports Power-On BIT (PBIT),also known as Power-On Self Test (POST), Continuous BIT (CBIT), and Initiated BIT (IBIT)
You can follow Extreme Engineering Solutions on Twitter or View their website here – www.x-es.com
Epiphany Architecture Promises Massive Floating-Point Gains
Epiphany Architecture
Earlier this month BittWare announced “A New Approach to Floating Point DSP” with the release of the Anemone Co-Processor. The Anemone floating point co-processor chip is designed for use with Altera’s high performance FPGAs. OEM’d from Adapteva’s new Epiphany architecture, BittWare’s Anemone chip is a scalable, true C-programmable, floating point engine that enables novel solutions for complex and evolving signal processing applications.
It’s something which has already caught the eye of FPGA and DSP specialist BittWare, which has licensed Adapteva’s Epiphany technology for use in its own Altera-based FPGAs under the name Anemone. “We believe that Adapteva’s Epiphany architecture represents a flash of brilliance that reintroduces some much needed creativity into the embedded signal processing world,” BittWare’s chief Jeff Milrod crowed at the launch of Anemone. “The resulting Anemone chip, combined with Altera’s family of FPGAs, creates an insanely cool solution for complex signal processing tasks that can be optimised for power, performance, and productivity.”
So what is Epiphany? Here’s the opening section of an interview with Andreas Olofsson of Adapteva with THINQ:
While chip giants ARM, Intel, and AMD battle for control of your smartphones and PCs, a small company in Massachusetts called Adapteva is starting a revolution: many-core processors that offer a significant performance boost over anything currently on the market. We chat to its founder Andreas Olofsson to find out what’s going on.
Initially, it’s easy to dismiss Adapteva’s chances of success as slim to none: in markets where a single processor architecture holds overwhelming dominance, such as x86 in mainstream computing and ARM in the world of smartphones, Olofsson has decided to develop an entirely new architecture.
Olofsson readily admits that history is littered with companies who have tried the same approach and failed. “In the mobile space there’s MIPS, for example,” he explained to thinq_ during our interview. “That’s another architecture, which has been around for 25, 30 years now – you know, it’s a great architecture, and yet they have very low traction. Everybody – 98 per cent of the market – uses ARM.”
To avoid falling into the same trap, Olofsson has a new idea – or, specifically, a variation on an old one. In the early days of personal computing, it was common for a central processor to have a ‘math co-processor’ chip alongside it – a secondary processor which was designed specifically to carry out floating point arithmetic at speeds significantly faster than the main processor. Intel had its 8087, Motorola its 68881, and AMD the stand-alone 9511.
Over time, however, these chips became integrated into the processor itself – evolving into the high-performance floating-point units, or FPUs, that are a feature of all modern central processors. Olofsson’s big idea, he explained, is to bring the days of the math co-processor back – and promises some major performance-per-watt gains for those making the step.
Read more / Source – THINQ
See Also – Wall Street Journal, BittWare Anemone, Adapteva
